Complements in Digital Computers

A concept-first, exam-oriented interactive module for BSc Computer Science, BCA, and MCA students.

1. Concept of Complements

In digital computers, a complement is a mathematical technique used to represent negative numbers and to perform subtraction using addition.

Why Complements Are Required

  • ALU hardware performs addition faster than subtraction
  • Single adder circuit can handle addition and subtraction
  • Efficient signed number representation in memory
  • Foundation of arithmetic logic unit (ALU) design
A − B = A + (2’s complement of B)
CPU Insight: Modern processors literally do not have a separate subtraction circuit — subtraction is simulated via complements.

2. 1’s and 2’s Complement Representation

1’s Complement

Formed by inverting all bits.

  • Has two zeros (+0 and −0)
  • Requires end-around carry
  • Rarely used in modern CPUs
+5 = 00000101
−5 = 11111010

2’s Complement

Formed by adding 1 to the 1’s complement.

  • Only one zero
  • No special carry handling
  • Standard in all modern computers
+5 = 00000101
1’s = 11111010
2’s = 11111011
Exam Trap: Students often forget to add +1 after 1’s complement.

3. Complement Playground (Learning Mode)

3A. Extended Playground: Decimal → Binary → Complement

Bit-by-Bit Complement Animation

4. Subtraction Using 2’s Complement

Inside the CPU, subtraction is implemented as addition.

5. Signed Number Range Explorer

6. Exam, Viva & Practice Questions

Why is 2’s complement preferred?

It avoids negative zero, simplifies ALU design, and allows subtraction using addition only.

Why does 2’s complement have one extra negative number?

Because zero has only one representation, the remaining bit pattern is assigned to a negative value.

Represent −18 in 8-bit 2’s complement.

18 = 00010010 → 1’s = 11101101 → 2’s = 11101110

7. How CPU Actually Uses 2’s Complement (ALU View)

Inside a CPU, the Arithmetic Logic Unit (ALU) performs only:

  • Binary addition
  • Bitwise operations (AND, OR, XOR, NOT)

Subtraction is never directly implemented. Instead:

A − B ⇒ A + (2’s complement of B)

Why This Matters

  • Same adder circuit handles both addition and subtraction
  • Less hardware → lower cost → faster execution
  • Uniform signed arithmetic across CPU instructions
Exam Line: “In 2’s complement system, subtraction is performed by addition using the complement of the subtrahend.”

8. Overflow Detection (Signed Arithmetic)

Overflow occurs when the result exceeds the representable range of the selected bit width.

9. 1’s Complement vs 2’s Complement (Comparison)

Feature 1’s Complement 2’s Complement
Zero Representation +0 and −0 Single zero
Carry Handling End-around carry Ignored
Hardware Complexity Higher Lower
Used in CPUs No Yes

10. MCQ Practice (Exam Mode)

Q1. Which system avoids negative zero?

2’s complement

Q2. Range of 8-bit signed number?

−128 to +127

Q3. Why 2’s complement is preferred?

It simplifies arithmetic and hardware design.

11. Memory Tricks for Exams

  • MSB = 1 → number is negative
  • 2’s complement = 1’s complement + 1
  • Signed range = −2ⁿ⁻¹ to +2ⁿ⁻¹ − 1
  • No subtraction hardware in CPU

12. Step-by-Step Binary Addition (Carry Propagation)

This visualizer demonstrates how the CPU adds two binary numbers bit-by-bit from LSB to MSB, including carry propagation.

Designed for BSc CS, BCA & MCA • Digital Computer Organization